Product Summary

The K4G323222A-PC50 is a 33,554,432 bits synchronous high data rate Dynamic RAM organized as 2 * 524,288 words by 32 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length, and programmable latencies allows the K4G323222A-PC50 to be useful for a variety of high bandwidth, high performance memory system applications. 8 columns block write improves performance in graphics systems.

Parametrics

K4G323222A-PC50 absolute maximum ratings: (1)Voltage on any pin relative to Vss, VIN, VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to Vss ,VDD, VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature, TSTG: -55 ~ +150℃; (4)Power dissipation, PD: 1 W; (5)Short circuit current, IOS: 50 mA.

Features

K4G323222A-PC50 features: (1)3.3V power supply ; (2)LVTTL compatible with multiplexed address; (3)Dual bank operation; (4)MRS cycle with address key programs: CAS Latency (2, 3); Burst Length (1, 2, 4, 8 & full page); Burst Type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock ; (6)Burst Read Single-bit Write operation; (7)DQM 0-3 for byte masking ; (8)Auto & self refresh; (9)32ms refresh period (2K cycle); (10)100 Pin PQFP, TQFP (14 × 20 mm).

Diagrams

K4G323222A-PC50 functional block diagram

K4G323222A
K4G323222A

Other


Data Sheet

Negotiable